Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 571
 
17.2.6.11 Bus Interface Unit 0 register (BIU0)
The Bus Interface Unit 0 Register provides a mean for BIU specific information, or BIU configuration 
information to be stored. Please see 
Section 17.4.3.2.1, Platform Flash Configuration Register 0 (PFCR0), 
for more information about register description.
This register is present only in Code flash 0.
NOTE
On this device, BIU0 and PFCR0 are the same register. Your software may 
refer to either register. For clarity, however, it is recommended that you use 
PFCR0.
17.2.6.12 Bus Interface Unit 1 register (BIU1)
The Bus Interface Unit 1 Register provides a mean for BIU specific information, or BIU configuration 
information to be stored. Please see Section 17.4.3.2.2, Platform Flash Configuration Register 1 (PFCR1), 
for more information about register description.
Address Offset: 0x0001C Reset value: 0xXXXXXXXX
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
BI031 BI030 BI029 BI028 BI027 BI026 BI025 BI024 BI023 BI022 BI021 BI020 BI019 BI018 BI017 BI016
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
BI015 BI014 BI013 BI012 BI011 BI010 BI009 BI008 BI007 BI006 BI005 BI004 BI003 BI002 BI001 BI000
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-10. Bus Interface Unit 0 register (BIU0)
Table 17-20. BIU0 field descriptions 
Field Description
0:31 BI031-00: Bus Interface unit 0 31-00 (Read/Write)
The writability of the bits in this register can be locked.
Address Offset: 0x00020 Reset value: 0xXXXXXXXX
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
BI131 BI130 BI129 BI128 BI127 BI126 BI125 BI124 BI123 BI122 BI121 BI120 BI119 BI118 BI117 BI116
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
BI115 BI114 BI113 BI112 BI111 BI110 BI109 BI108 BI107 BI106 BI105 BI104 BI103 BI102 BI101 BI100
rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X rw/X
Figure 17-11. Bus Interface Unit 1 register (BIU1)