Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
584 Freescale Semiconductor
17.2.7 Programming considerations
17.2.7.1 Modify operation
All the modify operations of the flash module are managed through the flash user registers interface.
All the sectors of the flash module belong to the same partition (bank), therefore when a Modify operation
is active on some sectors no read access is possible on any other sector (Read-While-Modify is not
supported).
During a flash modify operation, any attempt to read any flash memory location will output invalid data
and bit RWE of MCR will be automatically set. This means that the flash module is not fetchable when a
modify operation is active and these commands must be executed from another memory (internal RAM or
another flash module).
If a reset occurs during a modify operation, the operation is suddenly terminated and the macrocell is reset
to Read mode. The data integrity of the flash memory section where the modify operation has been
terminated is not guaranteed — the interrupted flash memory modify operation must be repeated.
In general, each modify operation is started through a sequence of three steps:
• The first instruction is used to select the desired operation by setting its corresponding selection bit
in MCR (PGM or ERS) or UT0 (MRE or EIE).
• The second step is the definition of the operands: the address and the data for programming or the
Sectors for erase or margin read.
• The third instruction is used to start the modify operation by setting EHV in MCR or AIE in UT0.
Once selected, but not yet started, one operation can be canceled by resetting the operation selection bit.
A summary of the available flash memory modify operations are shown in Table 17-36.
Once bit MCR.EHV (or UT0.AIE) is set, all the operands can no more be modified until bit MCR.DONE
(or UT0.AID) is high.
In general , each modify operation is completed through a sequence of four steps:
1. Wait for operation completion: wait for bit MCR.DONE (or UT0.AID) to go high.
2. Check operation result: check bit MCR.PEG (or compare UMISR0-4 with expected value).
3. Switch-Off FPEC by resetting MCR.EHV (or UT0.AIE).
4. Deselect current operation by clearing MCR.PGM/ERS (or UT0.MRE/EIE).
Table 17-36. Flash modify operations
Operation Select bit Operands Start bit
Double Word Program MCR.PGM Address and Data by Interlock Writes MCR.EHV
Sector Erase MCR.ERS LMS, HBS MCR.EHV
Array Integrity Check None LMS, HBS UT0.AIE
Margin Read UT0.MRE UT0.MRV + LMS, HBS UT0.AIE
ECC Logic Check UT0.EIE UT0.DSI, UT1, UT2 UT0.AIE
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