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NXP Semiconductors MPC5606S - Lcd Ram

NXP Semiconductors MPC5606S
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LCD Driver (LCD64F6B)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 815
NOTE
RMS stands for root mean square and is a statistical measure of the
magnitude of a varying quantity. It is calculated with the formula:
Eqn. 22-3
22.5.4 LCD RAM
For a segment on the LCD to be displayed, data must be written to the LCD RAM which is shown in
Section 22.4, Memory map and register definition. The bits in the LCD RAM correspond to the segments
that are driven by the frontplane and backplane drivers. Writing a 1 to a given location will result in the
corresponding display segment being driven with a differential RMS voltage, based on selected reference,
necessary to turn the segment ON when the LCDEN bit is set and the corresponding FP[n-1:0]EN bit is
set. Writing a 0 to a given location will result in the corresponding display segment being driven with a
differential RMS voltage necessary to turn the segment OFF. The LCD RAM is a dual port RAM that
interfaces with the internal address and data buses of the MCU. It is possible to read from LCD RAM
locations for scrolling purposes. Writing or reading of the LCDEN bit does not change the contents of the
LCD RAM. After a reset, the LCD RAM contents will be cleared.
22.5.5 LCD driver system enable and frontplane enable sequencing
If LCDEN = 0 (LCD Driver System disabled) and the frontplane enable bit, FP[n-1:0]EN, is set, the
frontplane driver waveform will not appear on the output until LCDEN is set. If LCDEN = 1 (LCD Driver
System enabled), the frontplane driver waveform will appear on the output as soon as the corresponding
frontplane enable bit, FP[n-1:0]EN, in the registers FPENR0 and FPENR1 is set.
22.5.6 LCD driver backplane remapping
The backplane and frontplane pins can be remapped/swapped using LCDBPS and LCDBPA. While
LCDBPA adds the non available backplane waveforms onto FP pins, LCDBPS does a swapping of
backplanes waveforms with frontplanes waveforms on selected pins. The swapping of LCDBPS depends
on the availability of Frontplane pins FP[n-1:0]. If the number of frontplanes n implemented is not
sufficient no remapping will occur. See
Table 22-28 for details.
V
RMS
V
2
td
0
T
T
---------------=

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