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NXP Semiconductors MPC5606S - LIN Integer Baud Rate Register (LINIBRR)

NXP Semiconductors MPC5606S
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LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 853
23.7.2.11 LIN integer baud rate register (LINIBRR)
B
Address: Base + 0x0028 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0
DIV_M[0:12]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-17. LIN integer baud rate register (LINIBRR)
Table 23-16. LINIBRR field descriptions
Field Description
0:18 Reserved
DIV_M[0:12]
19:31
LFDIV mantissa
These 12 bits define the LINFlex divider (LFDIV) mantissa value (see Ta bl e 23-17). This register
can be written in Initialization mode only.
Table 23-17. Integer baud rate selection
DIV_M[0:12] Mantissa
0x0000 LIN clock disabled
0x0001 1
... ...
0x1FFE 8190
ox1FFF 8191

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