System Status and Configuration Module (SSCM)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1217
38.2.2.4 Debug Status Port Register
The Debug Status Port register is used to (optionally) provide debug data on a set of pins.
Table 38-6. ERROR field descriptions
Field Description
14
PAE
Peripheral Bus Abort Enable. This bit enables bus aborts on any access to a peripheral slot that is not used
on the device. This feature is intended to aid in debugging when developing application code.
0 Illegal accesses to non-existing peripherals do not produce a Prefetch or Data Abort exception
1 Illegal accesses to non-existing peripherals produce a Prefetch or Data Abort exception
15
RAE
Register Bus Abort Enable. This bit enables bus aborts on illegal accesses to off-platform peripherals.
Illegal accesses are defined as reads or writes to reserved addresses within the address space for a
particular peripheral. This feature is intended to aid in debugging when developing application code.
0 Illegal accesses to peripherals do not produce a Prefetch or Data Abort exception
Transfers to Peripheral Bus resources may be aborted even before they reach the Peripheral Bus (i.e. at
the PBRIDGE level). In this case, the PER_ABORT and REG_ABORT register bits will have no effect on
the abort.
1 Illegal accesses to peripherals produce a Prefetch or Data Abort exception
Table 38-7. ERROR Allowed Register Accesses
8-bit 16-bit 32-bit
READ Allowed Allowed Allowed
WRITE Allowed Allowed Not Allowed
Address: Base + 0x0008 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0
DEBUG_MODE[2:
0]]
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 38-5. Debug Status Port (DEBUGPORT) Register
Table 38-8. DEBUGPORT field descriptions
Field Description
13-15
DEBUG
_MODE
[0:2]
Debug Status Port Mode. This field selects the alternate debug functionality for the Debug Status Port
000 No alternate functionality selected
001 Mode 1 Selected
010 Mode 2 Selected
011 Mode 3 Selected
100 Mode 4 Selected
101 Mode 5 Selected
110 Mode 6 Selected
111 Mode 7 Selected
Tabl e 38-9 describes the functionality of the Debug Status Port in each mode.