Quad Serial Peripheral Interface (QuadSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 993
Chapter 30
Quad Serial Peripheral Interface (QuadSPI)
30.1 Preface
30.1.1 Conventions
Table 30-1 contains conventions used in this document.
30.1.2 Acronyms and Abbreviations
Table 30-2 contains acronyms and abbreviations used in this document.
Table 30-1. Conventions
Terms Description
ACTIVE_HIGH Names for signals that are active high are shown in uppercase text without an overbar. Signals
that are active high are referred to as asserted when they are logic 1 and negated when they
are logic 0.
ACTIVE_LOW A bar over a signal name indicates that the signal is active low. Active-low signals are referred
to as asserted when they are logic 0 and negated when they are logic 1.
0x0F Hexadecimal numbers
0b0011 Binary numbers
x In certain contexts, such as a signal encoding, this indicates a don’t care. For example, if a
field is binary coded 0bx001, the state of the first bit is a don’t care.
REG[BIT] Denotes the bitfields BIT in the register REG
Table 30-2. Acronyms and Abbreviations
Terms Description
AHB Advanced High-performance Bus, version of AMBA
AMBA Advanced Microcontroller Bus Architecture
CS Chip Select.
DMA Direct Memory Access.
EOQ End of Queue
LSB Least Significant Bit
MSB Most Significant Bit
PCS Peripheral Chip Select
QSPI, QuadSPI Quad Serial Peripheral Interface
SCK Serial Communications Clock
SPI Serial Peripheral Interface
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