Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
396 Freescale Semiconductor
12.3.4.40 Soft Lock Bit Register L0
Figure 12-49 represents the Soft Lock Bit Register for Layer0. This is used to protect the seven control
descriptor layer registers for Layer0.
Figure 12-49. Soft Lock Register L0
Table 12-43. Global Protection Register field descriptions
Field Description
0
HLB
Hard Lock Bit. This bit cannot be cleared once it is set by software. It can only be cleared by a
system reset.
0 All SLBs are accessible and can be modified
1 All SLBs are write-protected and cannot be modified
Offset: 0x304 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
SLB_L0_1
SLB_L0_2
SLB_L0_3
SLB_L0_4
0 0 0 0
SLB_L0_5
SLB_L0_6
SLB_L0_7
0
W
WEN_LO_1
WEN_LO_2
WEN_LO_3
WEN_LO_4
WEN_LO_5
WEN_LO_6
WEN_LO_7
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 12-44. Soft Lock Register L0 field descriptions
Field Description
0
WEN_L0_1
Write Enable for Soft Lock Bit SLB_L0_1
0 SLB is not modified
1 Value is written to SLB
1
WEN_L0_2
Write Enable for Soft Lock Bit SLB_L0_2
0 SLB is not modified
1 Value is written to SLB
2
WEN_L0_3
Write Enable for Soft Lock Bit SLB_L0_3
0 SLB is not modified
1 Value is written to SLB
3
WEN_L0_4
Write Enable for Soft Lock Bit SLB_L0_4
0 SLB is not modified
1 Value is written to SLB
4
SLB_L0_1
Soft Lock Bit for Control Desc L0_1 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
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