DMA Channel Mux (DMACHMUX)
MPC5606S Microcontroller Reference Manual, Rev. 7
454 Freescale Semiconductor
13.4 Functional description
This section provides a functional description of the DMA channel mux. The primary purpose of the DMA
channel mux is to provide flexibility in the system’s use of the available DMA channels. As such,
configuration of the DMA Mux is intended to be a static procedure done during execution of the system
boot code. However, if the procedure outlined in Section 13.5.2, Enabling and configuring sources, is
followed, the configuration of the DMA channel mux may be changed during the normal operation of the
system.
Functionally, the DMA channel mux channels may be divided into two classes: channels that implement
the normal routing functionality plus periodic triggering capability, and channels that implement only the
normal routing functionality.
13.4.1 DMA channels with periodic triggering capability
Besides the normal routing functionality, the first four channels of the DMA Mux provide a special
periodic triggering capability that can be used to provide an automatic mechanism to transmit bytes,
frames, or packets at fixed intervals without the need for processor intervention. The trigger is generated
by the Periodic Interrupt Timer (PIT); as such, the configuration of the periodic triggering interval is done
via configuration registers in the PIT. Please refer to
Chapter 27, Periodic Interrupt Timer (PIT), for more
information on this topic.
Table 13-5 shows the mapping of PIT channels to DMA channels for triggering.
ALWAYS requestors 58
ALWAYS requestors 59
ALWAYS requestors 60
ALWAYS requestors 61
ALWAYS requestors 62
ALWAYS requestors 63
1
Configuring a DMA channel to select source 0 or any reserved sources will disable that DMA
channel.
Table 13-5. PIT-DMA channel mapping
PIT channel number
DMACHMUX channel number
for triggering
0 0
1 1
2 2
3 3
Table 13-4. DMACHMUX request assignments (continued)
DMA requesting module
DMACHMUX source number
(ipd_ref_peripher[N
periphs
:1])