Quad Serial Peripheral Interface (QuadSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1031
30.5 Functional description
The Quad Serial Peripheral Interface (QuadSPI) block can be used for two different types (mutually
exclusive) of serial communications:
• It supports standard SPI full-duplex, synchronous serial communications with peripheral devices.
• It acts as an interface to external serial flash devices via up to 4 bidirectional data lines.
30.5.1 Modes of operation
Refer to Section 30.2.3, QuadSPI modes of operation for an overview over the possible operational modes
of the QuadSPI block.
• SPI Master mode: In Master mode, the QuadSPI can initiate SPI communications with peripheral
devices. See Section 30.5.2.2, Master mode, for more details.
• SPI Slave mode: In Slave mode, the QuadSPI responds to SPI transfers initiated by an external SPI
master. SeeSection 30.5.2.3, Slave mode. for more details.
• Serial Flash mode can be used for write or read accesses to an external serial flash device.
— Serial Flash Write: Data can be programmed into the flash of the serial flash device. Refer to
Section 30.5.3.2, Flash Programming, for further details.
— Serial Flash Read: Read the contents of the serial flash device. Two separate read channels are
available via RX Buffer and AHB Buffer, see
Section 30.5.3.3, Flash Read.
• Stop mode: The mode is used for power management. When a request is made to enter Stop mode,
the QuadSPI block acknowledges the request and completes the transfer in progress, then the
system clocks to the QuadSPI block may be shut off, see Section , Like all power saving features,
Address: QSPI_AMBA_BASE + 0x07FF FFFC
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R ARXD[31:16]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R ARXD[15:0]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-22. AHB RX Data Buffer (QSPI_ARDB)
Table 30-36. QSPI_ARDB field descriptions
Field Description
ARXD AMBA provided RX Buffer Data.
Byte order (endianess) is identical to the RX Buffer Data Registers.
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