NXP Semiconductors MPC5606S - Memory Map and Register Definition

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
338 Freescale Semiconductor
12.3 Memory map and register definition
12.3.1 Memory map
Table 12-2 shows the memory map of the DCU.
12.3.2 Register map
Table 12-3 provides the register map of the DCU.
Only 32-bit writes and 32-bit aligned access are supported. Byte and half-word accesses are not supported.
Table 12-2. DCU memory map
Parameter Address range
Register address space 0x0000 – 0x03FF
Cursor address space 0x0400 – 0x07FF
Gamma_R address space 0x0800 – 0x0BFF
Gamma_G address space 0x0C00 – 0x0FFF
Gamma_B address space 0x1000 – 0x13FF
Empty space 0x1400 – 0x1FFF
CLUT/Tile address space 0x2000 – 0x3FFF
Table 12-3. DCU register map
Address offset Register Access Reset value Location
General registers
0x000 CtrlDescL0_1 Register R/W 0x00000000 on page 353
0x004 CtrlDescL0_2 Register R/W 0x00000000 on page 354
0x008 CtrlDescL0_3 Register R/W 0x00000000 on page 355
0x00C CtrlDescL0_4 Register R/W 0x00000000 on page 356
0x010 CtrlDescL0_5 Register R/W/ 0x00000000 on page 358
0x014 CtrlDescL0_6 Register R/W/ 0x00000000 on page 359
0x018 CtrlDescL0_7 Register R/W/ 0x00000000 on page 361
0x01C CtrlDescL1_1 Register R/W 0x00000000 on page 353
0x020 CtrlDescL1_2 Register R/W 0x00000000 on page 354
0x024 CtrlDescL1_3 Register R/W 0x00000000 on page 355
0x028 CtrlDescL1_4 Register R/W 0x00000000 on page 356
0x02C CtrlDescL1_5 Register R/W 0x00000000 on page 358
0x030 CtrlDescL1_6 Register R/W 0x00000000 on page 359
0x034 CtrlDescL1_7 Register R/W 0x00000000 on page 361