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NXP Semiconductors MPC5606S - DMA Registers

NXP Semiconductors MPC5606S
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Analog-to-Digital Converter (ADC)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 153
5.4.4 DMA registers
5.4.4.1 DMA Enable Register (DMAE)
The DMA Enable (DMAE) register sets up the DMA for use with the ADC.
Address:
Base + 0x0040 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DCL
R
DMA
EN
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-15. DMA Enable Register (DMAE)
Table 5-15. DMA Enable Register (DMAE) field descriptions
Field Description
0–29 Reserved
A write of any value has no effect. The read value is always 0.
30
DCLR
DMA clear sequence enable
0 DMA request cleared by Acknowledge from DMA controller.
1 DMA request cleared automatically before DMA occurs In this mode the DMA will not be performed.
31
DMAEN
DMA global enable
0 DMA feature disabled.
1 DMA feature enabled.

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