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NXP Semiconductors MPC5606S - Sampling Register (QSPI_SMPR)

NXP Semiconductors MPC5606S
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Quad Serial Peripheral Interface (QuadSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
1020 Freescale Semiconductor
30.4.3.13 Sampling Register (QSPI_SMPR)
The Sampling Register allows configuration of the scheme how the incoming data from an external serial
flash device are sampled in the QuadSPI module. Its fields are relevant in SFM mode only.
Address: QSPI_BASE +
0x104
Write: ICO: QSPI_SFMSR[IP_ACC] = 0 and QSPI_MCR[QMODE] = 1
IC: QSPI_SFMSR[IP_ACC] = 0
and QSPI_SFMSR[AHB_ACC] = 0
and QSPI_MCR[QMODE] = 1
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
ICO
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ICO IC
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-12. Instruction Code Register (QSPI_ICR)
Table 30-25. QSPI_ICR field descriptions
Field Description
ICO Instruction Code Options, additional parameters for the IC instruction specified in the IC field.
Meaning of the individual bits vary for each instruction code and vendor, detailed description in
Tabl e 30-53.
Only applicable in SFM mode
IC Write access: Instruction Code of the SFM command to be executed next.
Read access: Instruction Code of the last SFM command successfully written.
Upon writing this byte a new command sequence is started to the external serial flash device, if the
module is in serial flash mode.
Only applicable in SFM mode

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