LCD Driver (LCD64F6B)
MPC5606S Microcontroller Reference Manual, Rev. 7
790 Freescale Semiconductor
22.4.2 Register descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number.
22.4.2.1 LCD Control Register (LCDCR)
6
End of implemented RAM for 56 FPs
7
End of implemented RAM for 60 FPs
8
End of implemented RAM for 64 FPs
Address: Base + 0x00 Access: User read/write
0 1 2 3 4 5 6 7
R
LCDEN LCDRST LCDRCS DUTY BIAS VLCDS
W
Reset 0 0 0 0 0 0 0 0
8 9 10 11 12 13 14 15
R
PWR BSTEN BSTSEL BSTAO LCDOCS LCDINT EOF
W
Reset 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23
R
NOF
W
Reset 0 0 0 0 0 0 0 0
24 25 26 27 28 29 30 31
R
LCDBPA LCDBPS
W
Reset 0 0 0 0 0 0 0 0
Figure 22-2. LCD Control Register (LCDCR)
Table 22-6. LCDCR field descriptions
Field Description
0 LCDEN. LCD Driver System Enable.
0 All frontplane and backplane pins are disabled. In addition, the LCD Driver is disabled and all LCD
waveform generation clocks are stopped.
1 LCD Driver System is enabled. All FP[n-1:0] pins with FP[n-1]EN set, will output an LCD driver
waveform. The BP[m-1:0] pins will output an LCD Driver waveform based on the settings of DUTY.
To Next Page
Loading...
