NXP Semiconductors MPC5606S - Run0...3 Mode Configuration Registers (ME_RUN0...3_MC)

Mode Entry Module (MC_ME)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 925
25.3.2.12 Run0…3 Mode Configuration Registers (ME_RUN0…3_MC)
This register configures system behavior during Run0…3 modes. Please refer to Table 25-11 for details.
NOTE
Byte and half-word write accesses are not allowed to this register.
25.3.2.13 Halt Mode Configuration Register (ME_HALT_MC)
This register configures system behavior during Halt mode. Please refer to Table 25-11 for details.
NOTE
Byte and half-word write accesses are not allowed to this register.
Address 0xC3FD_C030–0xC3FD_C03C Access: Supervisor read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 0 0 0 0 0 0 PDO 0 0
MVRON
DFLAON CFLAON
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 0
FMPLL1ON FMPLL0ON
FXOSCON
FIRCON
SYSCLK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Figure 25-13. Run0…3 Mode Configuration Registers (ME_RUN0…3_MC)
Address 0xC3FD_C040 Access: Supervisor read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 PDO 0 0
MVRON
DFLAON CFLAON
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 0
FMPLL1ON FMPLL0ON
FXOSCON
FIRCON
SYSCLK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0
Figure 25-14. Halt Mode Configuration Register (ME_HALT_MC)