NXP Semiconductors MPC5606S - Chapter 25; Mode Control Register (ME_MCTL)

Mode Entry Module (MC_ME)
MPC5606S Microcontroller Reference Manual, Rev. 7
914 Freescale Semiconductor
25.3.2.2 Mode Control Register (ME_MCTL)
This register is used to trigger software-controlled mode changes. Depending on the modes as enabled by
ME_ME register bits, configurations corresponding to unavailable modes are reserved and access to
ME_<mode>_MC registers must respect this for successful mode requests.
S_FXOSC fast external crystal oscillator (4-16MHz) status
0 fast external crystal oscillator (4-16MHz) is not stable
1 fast external crystal oscillator (4-16MHz) is providing a stable clock
S_FIRC fast internal RC oscillator (16MHz) status
0 fast internal RC oscillator (16MHz) is not stable
1 fast internal RC oscillator (16MHz) is providing a stable clock
S_SYSCLK System clock switch status — These bits specify the system clock currently used by the system.
0000 16MHz int. RC osc.
0001 div. 16MHz int. RC osc.
0010 reserved
0011 div. 4-16MHz ext. osc.
0100 primary freq. mod. PLL
0101 reserved
0110 reserved
0111 reserved
1000 reserved
1001 reserved
1010 reserved
1011 reserved
1100 reserved
1101 reserved
1110 reserved
1111 system clock is disabled
Address 0xC3FD_C004 Access: Supervisor read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
TARGE T_ MO DE
0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1
W KEY
Reset 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1
Figure 25-3. Mode Control Register (ME_MCTL)
Table 25-4. Global Status Register (ME_GS) field descriptions (continued)
Field Description