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NXP Semiconductors MPC5606S - Functional Description

NXP Semiconductors MPC5606S
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CAN Sampler
MPC5606S Microcontroller Reference Manual, Rev. 7
184 Freescale Semiconductor
7.4 Functional description
As the CAN Sampler is driven by the 16 MHz IRC to properly sample the CAN identifier, two modes are
possible, depending on both the CAN baud rate and the low-power mode used:
Immediate sampling on falling edge detection (first CAN frame): this mode is used when the IRC
16 MHz is available in low-power mode, for example Stop or Halt.
Sampling on next frame (second CAN frame): this mode is used when the IRC 16 MHz is switched
off in low-power mode, for example Standby. Due to the startup times of both the voltage regulator
and the IRC 16 MHz (~10 µs), the CAN Sampler would miss the first bits of a CAN identifier sent
at 500 kbit/s. Therefore the first identifier is ignored and the sampling is performed on the first
falling edge of after interframe space.
The CAN Sampler performs sampling on a user-selected CAN Rx port, normally when the device is in
Standby or Stop mode storing the samples in internal registers. The user is required to configure the baud
rate to achieve 8 samples per CAN nominal bit. It does not perform any sort of filtering on input samples.
Thereafter, the software must enable the sampler by setting the CAN_SMPLR_EN bit in the CR register.
It then becomes the master controller for accessing the internal registers implemented for storing samples.
When enabled, the CAN Sampler waits for a low pulse on the selected Rx line, taking it as a valid bit of
the first CAN frame. It generates the RC wakeup request, which can be used to start the RC oscillator.
Depending on the mode, it stores the first 8 samples of the 48 bits on the selected Rx line or skips the first
frame and stores 8 bits for the first 48 bits of the second frame. In FF_MODE, it samples the CAN Rx line
on the RC clock and stores the 8 samples of the first 48 bits (384 samples). In SF_MODE, it samples the
Rx line and waits for 11 consecutive dominant bits (11
× 8 samples), taking it as the end of the first frame.
It then waits for the first low pulse on the Rx line, taking it as a valid Start of Frame (SOF) of the second
frame. The sampler takes 384 samples (48 bytes
× 8) using the RC clock (configuring 8 samples per
Address Offset: 0x04 Reset value: xxxx xxxxh
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SR[0:15]
W
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
SR[16:31]
W
Figure 7-3. Sample Register 0
Address Offset: 0x30 Reset value: xxxx xxxxh
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SR[0:15]
W
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
SR[16:31]
W
Figure 7-4. Sample Register 11

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