NXP Semiconductors MPC5606S - LCD Frontplane Enable Register 0 (FPENR0)

LCD Driver (LCD64F6B)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 795
22.4.2.4 LCD Frontplane Enable Register 0 (FPENR0)
Address: Base + 0x10 Access: User read/write
0 1 2 3 4 5 6 7
R
FP31EN FP30EN FP29EN FP28EN FP27EN FP26EN FP25EN FP24EN
W
Reset 0 0 0 0 0 0 0 0
8 9 10 11 12 13 14 15
R
FP23EN FP22EN FP121EN FP20EN FP19EN FP18EN FP17EN FP16EN
W
Reset 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23
R
FP15EN FP14EN FP13EN FP12EN FP11EN FP10EN FP9EN FP8EN
W
Reset 0 0 0 0 0 0 0 0
24 25 26 27 28 29 30 31
R
FP7EN FP6EN FP5EN FP4EN FP3EN FP2EN FP1EN FP0EN
W
Reset 0 0 0 0 0 0 0 0
Figure 22-5. LCD Frontplane Enable Register 0 (FPENR0)
Table 22-9. FPENR0 field descriptions
Field Description
0:31 FP[31:0]EN. Frontplane Output Enable.
The FP[31:0]EN bits enable the frontplane driver outputs. If LCDEN = 0, these bits have no effect on the
state of the I/O pins. It is recommended to set FP[31:0]EN bits before LCDEN is set.
0 Frontplane driver output disabled on FP[31:0].
1 Frontplane driver output enabled on FP[31:0].