NXP Semiconductors MPC5606S - Modulation Register (MR)

Clock Description
MPC5606S Microcontroller Reference Manual, Rev. 7
220 Freescale Semiconductor
8.9.5.2 Modulation Register (MR)
Offset 0x0004 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R STR
B_B
YPA
SS
0
SPR
D_S
EL
MOD_PERIOD
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
FM_
EN
INC_STEP
W
Reset 0 0 0 0 0 0 0 0 0 0 –
1
0 0 0 0 0
Figure 8-25. Modulation Register (MR)
Table 8-25. MR field descriptions
Field Description
0
STRB_BYPASS
Strobe bypass
The STRB_BYPASS signal is used to bypass the STRB signal used inside PLL to latch the
correct values for control bits (INC_STEP, MOD_PERIOD and SPRD_SEL).
0 STRB is used to latch PLL modulation control bits.
1 STRB is bypassed. In this case control bits need to be static. The control bits must be
changed only when PLL is in power-down mode.
2
SPRD_SEL
Spread type selection
The SPRD_SEL controls the spread type in Frequency Modulation mode.
0 Center spread
1Down spread
3–15
MOD_PERIOD
Modulation period
The MOD_PERIOD field is the binary equivalent of the value modperiod derived from
following formula:
where:
f
ref
: represents the frequency of the feedback divider
f
mod
: represents the modulation frequency
The maximum value of MOD_PERIOD is 0x1000.
modperiod
f
ref
4f
mod

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