NXP Semiconductors MPC5606S - Error Configuration

System Status and Configuration Module (SSCM)
MPC5606S Microcontroller Reference Manual, Rev. 7
1216 Freescale Semiconductor
38.2.2.3 Error Configuration
The Error Configuration register is a read-write register that controls the error handling of the system.
Address: Base + 0x0002 Access: Read Only
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
IVLD
DVL
D
W
RESET: x x x x x x x x x x 1 x x x x 1
Figure 38-3. System Memory Configuration (MEMCONFIG) Register
Table 38-4. MEMCONFIG field descriptions
Field Description
IVLD Code Flash Valid. This bit identifies whether or not the on-chip Code Flash is accessible in the system
memory map. The Flash may not be accessible due to security limitations, or because there is no Flash in
the system.
0 Code Flash is not accessible
1 Code Flash is accessible
DVLD Data Flash Valid. This bit identifies whether or not the on-chip Data Flash is visible in the system memory
map. The Flash may not be accessible due to security limitations, or because there is no Flash in the
system.
0 Data Flash is not visible
1 Data Flash is visible
Table 38-5. MEMCONFIG Allowed Register Accesses
8-bit 16-bit 32-bit
READ Allowed Allowed Allowed
(also reads STATUS register)
WRITE Not Allowed Not Allowed Not Allowed
Address: Base + 0x0006 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PAE RAE
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 38-4. Error Configuration (ERROR) Register