Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
438 Freescale Semiconductor
The bit definitions for the status word XY are given in Table 12-68.
Figure 12-81. PDI Input data mode
Figure 12-81 represents the scenario in which data from an ITU-R BT.656 compliant video source is fed
into the PDI interface. The incoming data includes codes that trigger the start and end of the active video
and blanking fields. An activity detector checks for the transitions on the PDI bus. It samples the values
on the PDI bus and once it has detected valid activity, sets a flag in the status register and can optionally
trigger an interrupt. The PDI interface has a state machine which extracts the control information from the
video data. The machine checks the video data for the Preamble Field (0xFF,0x00,0x00) and then
depending on the status bits XY decides if it has received a valid control signal.
12.8.2 PDI interface description
12.8.2.1 Introduction
This block takes pixel information from the video source and passes to the DCU block to display the pixel
information to the TFT/LCD screen. It can also be used in the Slave mode; that is, it takes only timing info
from external chip/FPGA and display pixel info from memory to TFT screen at the timing provided.
D6 1 0 0 H
D5 1 0 0 P3
D4 1 0 0 P2
D3 1 0 0 P1
D2 1 0 0 P0
D1 1 0 0 0
D0 1 0 0 0
Table 12-65. Control byte sequence for 8-bit video (continued)
Data Bit
First word
(FF)
Second word
(00)
Third word
(00)
Fourth word
(XY
Video source
with embedded
ITU656 timing
CLK
embedded control
pdi_clk
Activity
Detector
ready
Data with
PDI
Interface
Logic
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