NXP Semiconductors MPC5606S - LIN Interrupt Enable Register (LINIER)

LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
840 Freescale Semiconductor
23.7.2.2 LIN interrupt enable register (LINIER)
Table 23-6. Operating mode selection
SLEEP INIT Operating mode
1 0 Sleep (reset value)
x 1 Initialization
0 0 Normal
Address: Base + 0x0004 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
SZIE OCIE BEIE CEIE HEIE
0 0
FEIE BOIE LSIE WUIE DBFIE DBEIE DRIE DTIE HRIE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-8. LIN interrupt enable register (LINIER)
Table 23-7. LINIER field descriptions
Field Description
0:15 Reserved
SZIE
16
Stuck at Zero Interrupt Enable
0 No interrupt when SZF bit in LINESR or UARTSR is set.
1 Interrupt generated when SZF bit in LINESR or UARTSR is set.
OCIE
17
Output Compare Interrupt Enable
0 No interrupt when OCF bit in LINESR or UARTSR is set.
1 Interrupt generated when OCF bit in LINESR or UARTSR is set.
BEIE
18
Bit Error Interrupt Enable
0 No interrupt when BEF bit in LINESR is set.
1 Interrupt generated when BEF bit in LINESR is set.
CEIE
19
Checksum Error Interrupt Enable
0 No interrupt on Checksum error.
1 Interrupt generated when checksum error flag (CEF) in LINESR is set.
HEIE
20
Header Error Interrupt Enable
0 No interrupt on Break Delimiter error, Synch Field error, Identifier field error.
1 Interrupt generated on Break Delimiter error, Synch Field error, Identifier field error.
21:22 Reserved