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NXP Semiconductors MPC5606S - SIGN_CALC_1 Register

NXP Semiconductors MPC5606S
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Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
380 Freescale Semiconductor
Figure 12-31. Divide Ratio (DIV_RATIO) register
12.3.4.23 SIGN_CALC_1 Register
Figure 12-32 presents the register for vertical/horizontal size of the area for CRC calculation.
Figure 12-32. SIGN_CALC_1 Register
Offset: 0x214 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0
DIV_RATIO
W
Reset 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1
Table 12-26. DIV_RATIO field descriptions
Field Description
24–31
DIV_RATIO
Specifies the divide value for the input clock. Used to generate the pixel clock to support
different types of displays. To divide by N, set the DIV_RATIO to (N-1).
Offset: 0x218 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0
SIG_VER_SIZE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0
SIG_HOR_SIZE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 12-27. SIGN_CALC_1 field descriptions
Field Description
6–15
SIG_VER_SIZE
Vertical size of the window of interest of pixels for CRC calculation (in pixels)
22–31
SIG_HOR_SIZE
Horizontal size of window of interest of pixels for CRC calculations (in pixels)

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