Register Map
MPC5606S Microcontroller Reference Manual, Rev. 7
1290 Freescale Semiconductor
Channel 46 Data Register CDR46 32-bit Base + 0x1B8
Channel 47 Data Register CDR47 32-bit Base + 0x1BC
Channel 48 Data Register CDR48 32-bit Base + 0x1C0
Reserved — — Base +
(0x1C4–0x1FC)
Channel 64 Data Register CDR64 32-bit Base + 0x200
Channel 65 Data Register CDR65 32-bit Base + 0x204
Channel 66 Data Register CDR66 32-bit Base + 0x208
Channel 67 Data Register CDR67 32-bit Base + 0x20C
Channel 68 Data Register CDR68 32-bit Base + 0x210
Channel 69 Data Register CDR69 32-bit Base + 0x214
Channel 70 Data Register CDR70 32-bit Base + 0x218
Channel 71 Data Register CDR71 32-bit Base + 0x21C
Reserved — — Base +
(0x220–0x2FC)
I2C 0 Section 20.4, Memory map and register description 0xFFE3_0000
I2C Bus Address Register IBAD 8-bit Base + 0x0000
I2C Bus Frequency Divider Register IBFD 8-bit Base + 0x0001
I2C Bus Control Register IBCR 8-bit Base + 0x0002
I2C Bus Status Register IBSR 8-bit Base + 0x0003
I2C Bus Data I/O Register IBDR 8-bit Base + 0x0004
I2C Bus Interrupt Config Register IBIC 8-bit Base + 0x0005
Reserved — — Base +
(0x0006–0xFFFF)
I2C 1 Section 20.4, Memory map and register description 0xFFE3_4000
I2C Bus Address Register IBAD 8-bit Base + 0x0000
I2C Bus Frequency Divider Register IBFD 8-bit Base + 0x0001
I2C Bus Control Register IBCR 8-bit Base + 0x0002
I2C Bus Status Register IBSR 8-bit Base + 0x0003
I2C Bus Data I/O Register IBDR 8-bit Base + 0x0004
I2C Bus Interrupt Config Register IBIC 8-bit Base + 0x0005
Reserved — — Base +
(0x0006–0xFFFF)
I2C 2 Section 20.4, Memory map and register description 0xFFE3_8000
Table B-2. Detailed register map (continued)
Register description Register Name
Used
Size
Address