NXP Semiconductors MPC5606S - External Signal Description

Memory Protection Unit (MPU)
MPC5606S Microcontroller Reference Manual, Rev. 7
884 Freescale Semiconductor
24.1.4 External signal description
The MPU module does not include any external interface. The MPU’s internal interfaces include an IPS
connection for accessing the programming model and multiple connections to the address phase signals of
the platform crossbar’s slave AHB ports. From a platform topology viewpoint, the MPU module appears
to be directly connected “downstream” from the crossbar switch with interfaces to the AHB slave ports.
24.2 Memory map and register description
The MPU module provides an IPS programming model mapped to an SPP-standard on-platform 16 KB
space. The programming model is partitioned into three groups: control/status registers, the data structure
containing the region descriptors and the alternate view of the region descriptor access control values.
The programming model can only be referenced using 32-bit (word) accesses. Attempted references using
different access sizes, to undefined (reserved) addresses, or with a non-supported access type (for example,
a write to a read-only register or a read of a write-only register) generate an IPS error termination.
Finally, the programming model allocates space for an MPU definition with 8 region descriptors and up to
3 AHB slave ports, like flash controller, system ram controller and IPS peripherals bus.
24.2.1 Memory map
The MPU programming model map is shown in Table 24-1.
Table 24-1. MPU memory map
Offset
address
Register name Register description
Size
(bits)
Access Location
0x0000 MPU_CESR MPU Control/Error Status Register 32 R/
partial-W
on page 885
0x0004–
0x000F
Reserved
0x0010 MPU_EAR0 MPU Error Address Register, Slave Port 0 32 R-only on page 886
0x0014 MPU_EDR0 MPU Error Detail Register, Slave Port 0 32 R-only on page 887
0x0018 MPU_EAR1 MPU Error Address Register, Slave Port 1 32 R-only on page 886
0x001C MPU_EDR1 MPU Error Detail Register, Slave Port 1 32 R-only on page 887
0x0020 MPU_EAR2 MPU Error Address Register, Slave Port 2 32 R-only on page 886
0x0024 MPU_EDR2 MPU Error Detail Register, Slave Port 2 32 R-only on page 887
0x0028 MPU_EAR3 MPU Error Address Register, Slave Port 3 32 R-only on page 886
0x002C MPU_EDR3 MPU Error Detail Register, Slave Port 3 32 R-only on page 887
0x0030–
0x03FF
Reserved
0x0400 MPU_RGD0 MPU Region Descriptor 0 128 R/W on page 888
0x0410 MPU_RGD1 MPU Region Descriptor 1 128 R/W on page 888