NXP Semiconductors MPC5606S - START Signal

Inter-Integrated Circuit Bus Controller Module (I
2
C)
MPC5606S Microcontroller Reference Manual, Rev. 7
742 Freescale Semiconductor
Figure 20-10. I
2
C Bus Transmission Signals
20.5.2.1 START Signal
When the bus is free, i.e. no master device is engaging the bus (both SCL and SDA lines are at logical
high), a master may initiate communication by sending a START signal. As shown in Figure 20-10, a
START signal is defined as a high-to-low transition of SDA while SCL is high. This signal denotes the
beginning of a new data transfer (each data transfer may contain several bytes of data) and brings all slaves
out of their idle states.
Figure 20-11. Start and stop conditions
SCL
SDA
Start
Signal
Ack
Bit
12345678
MSB LSB
12345678
MSB LSB
Stop
Signal
No
SCL
SDA
12345678
MSB LSB
12 5 678
MSB LSB
Repeated
34
9 9
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W XXX D7 D6 D5 D4 D3 D2 D1 D0
Calling Address Read/ Data Byte
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
New Calling Address
99
XX
Ack
Bit
Write
Start
Signal
Start
Signal
Ack
Bit
Calling Address Read/
Write
Stop
Signal
No
Ack
Bit
Read/
Write
SDA
SCL
Start condition Stop condition