NXP Semiconductors MPC5606S - AHB Bus Register Memory Map Descriptions

Quad Serial Peripheral Interface (QuadSPI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1029
30.4.3.21 SFM Interrupt and DMA Request Select and Enable Register
(QSPI_SFMRSER)
The QSPI_SFMRSER register provides enables and selectors for all interrupts in serial flash mode.
30.4.4 AHB bus register memory map descriptions
This chapter contains definitions of registers in the AMBA address space.
Address: QSPI_BASE + 0x164 Write: Anytime
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
TBFIE
TBUIE
0 0 0 0
RBDDE
0 0 0
RBOIE
RBDIE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0
ABOIE
0
IPAEIE
IPIEIE
ICEIE
0 0 0 0
TFIE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 30-21. SFM Interrupt and DMA Request Select and Enable Register (QSPI_SFMRSER)
Table 30-34. QSPI_SFMRSER field descriptions
Field Description
TBFIE TX Buffer Fill Interrupt Enable
TBUIE TX Buffer Underrun Interrupt Enable
RBDDE RX Buffer Drain DMA Enable: Enables generation of DMA requests for RX Buffer Drain. When
this bit is set DMA requests via the ipd_req_rfdf line are generated as long as the
QSPI_SFMSR[RXNE] status bit is set.
0 No DMA request will be generated
1 DMA request will be generated
RBOIE RX Buffer Overflow Interrupt Enable
RBDIE RX Buffer Drain Interrupt Enable: Enables generation of IRQ requests for RX Buffer Drain. When
this bit is set the ipi_int_rfdf line is asserted as long as the QSPI_SFMSR[RBDF] flag is set.
0 No RBDF interrupt will be generated
1 RBDF Interrupt will be generated
ABOIE AHB Buffer Overflow Interrupt Enable
IPAEIE IP Command Trigger during AHB Access Error Interrupt Enable
IPIEIE IP Command Trigger during IP Access Error Interrupt Enable
ICEIE Instruction Code Error Interrupt Enable
TFIE Transaction Finished Interrupt Enable