FlexCAN
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 703
If the corresponding interrupt flag bit is set, the frame was transmitted. If the corresponding
interrupt flag bit is reset, the CPU must wait for it to be set, and then the CPU must read the CODE
field to check if the MB was aborted (CODE = 1001) or was transmitted (CODE = 1000).
18.4.6.2 Message Buffer deactivation
Deactivation is a mechanism provided to maintain data coherence when the CPU writes to the Control and
Status word of active MBs out of Freeze mode. Any CPU write access to the Control and Status word of
an MB causes that MB to be excluded from the transmit or receive processes during the current matching
or arbitration round. The deactivation is temporary, affecting only the current match/arbitration round.
The purpose of deactivation is data coherency. The match/arbitration process scans the MBs to decide
which MB to transmit or receive. If the CPU updates the MB in the middle of a match or arbitration
process, the data of that MB may no longer be coherent—therefore deactivation of that MB is done.
Even with the coherence mechanism described above, writing to the Control and Status word of active
MBs when not in Freeze mode may produce undesirable results. Examples are:
• Matching and arbitration are one-pass processes. If MBs are deactivated after they are scanned, no
re-evaluation is done to determine a new match/winner. If an Rx MB with a matching ID is
deactivated during the matching process after it was scanned, then this MB is marked as invalid to
receive the frame, and FlexCAN will keep looking for another matching MB within the ones it has
not scanned yet. If it cannot find one, then the message will be lost. Suppose, for example, that two
MBs have a matching ID to a received frame, and the user deactivated the first matching MB after
FlexCAN has scanned the second. The received frame will be lost even if the second matching MB
was free to receive.
• If a Tx MB containing the lowest ID is deactivated after FlexCAN has scanned it, then FlexCAN
will look for another winner within the MBs that it has not scanned yet. Therefore, it may transmit
an MB with ID that may not be the lowest, at the time because a lower ID might be present in one
of the MBs that it had already scanned before the deactivation.
• There is a point in time until which the deactivation of a Tx MB causes it not to be transmitted (end
of move-out). After this point, it is transmitted but no interrupt is issued and the Code field is not
updated. In order to avoid this situation, the abort procedures described in Section 18.4.6.1,
Transmission abort mechanism should be used.
18.4.6.3 Message Buffer lock mechanism
Besides MB deactivation, FlexCAN has another data coherence mechanism for the receive process. When
the CPU reads the Control and Status word of an “active not empty” Rx MB, FlexCAN assumes that the
CPU wants to read the whole MB in an atomic operation, and thus it sets an internal lock flag for that MB.
The lock is released when the CPU reads the Free Running Timer (global unlock operation), or when it
reads the Control and Status word of another MB. The MB locking is done to prevent a new frame to be
written into the MB while the CPU is reading it.
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