NXP Semiconductors MPC5606S - Buffer Data Register LSB (BDRL)

LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 857
23.7.2.15 Buffer data register LSB (BDRL)
23.7.2.16 Buffer data register MSB (BDRM)
Address: Base + 0x0038 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
DATA3[0:7] DATA2[0:7]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
DATA1[0:7] DATA0[0:7]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-21. Buffer data register LSB (BDRL)
Table 23-21. BDRL field descriptions
Field Description
DATA3[0:7]
0:7
Data Byte 3
Data byte 3 of the data field.
DATA2[0:7]
8:15
Data Byte 2
Data byte 2 of the data field.
DATA1[0:7]
16:23
Data Byte 1
Data byte 1 of the data field.
DATA0[0:7]
24:31
Data Byte 0
Data byte 0 of the data field.
Address: Base + 0x003C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
DATA7[0:7] DATA6[0:7]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
DATA5[0:7] DATA4[0:7]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-22. Buffer data register MSB (BDRM)