NXP Semiconductors MPC5606S - Password Comparison Registers

System Status and Configuration Module (SSCM)
MPC5606S Microcontroller Reference Manual, Rev. 7
1218 Freescale Semiconductor
38.2.2.5 Password Comparison Registers
These registers allow to unsecure the device, if the correct password is known.
Table 38-9. Debug status port modes
Pin
1
1
All signals are active high, unless otherwise noted
Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Mode 7
0
STATUS[0] STATUS[8] MEMCONFIG[0] MEMCONFIG[8] Reserved Reserved Reserved
1
STATUS[1] STATUS[9] MEMCONFIG[1] MEMCONFIG[9] Reserved Reserved Reserved
2
STATUS[2] STATUS[10] MEMCONFIG[2] MEMCONFIG[10] Reserved Reserved Reserved
3
STATUS[3] STATUS[11] MEMCONFIG[3] MEMCONFIG[11] Reserved Reserved Reserved
4
STATUS[4] STATUS[12] MEMCONFIG[4] MEMCONFIG[12] Reserved Reserved Reserved
5
STATUS[5] STATUS[13] MEMCONFIG[5] MEMCONFIG[13] Reserved Reserved Reserved
6
STATUS[6] STATUS[14] MEMCONFIG[6] MEMCONFIG[14] Reserved Reserved Reserved
7
STATUS[7] STATUS[15] MEMCONFIG[7] MEMCONFIG[15] Reserved Reserved Reserved
Table 38-10. DEBUGPORT allowed register accesses
8-bit 16-bit 32-bit
1
1
All 32-bit accesses must be aligned to 32-bit addresses (i.e. 0x0, 0x4, 0x8 or 0xC).
READ Allowed Allowed Not Allowed
WRITE Allowed Allowed Not Allowed
Address: 0x000C Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W PWD_HI[0:15]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W PWD_HI[16:31]
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 38-6. Password Comparison Register High Word (PWCMPH)