Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 253
9.4.2.9 eMIOS200 UC Status Register (EMIOSS[n])
Figure 9-16. eMIOS200 UC Status Register (EMIOSS[n])
NOTE
emios_flag_out reflects the FLAG bit value. When DMA bit is set, the
FLAG bit can be cleared by the DMA controller.
9.4.2.10 eMIOS200 UC Alternate A Register (EMIOSALTA[n])
EMIOSALTA[n] address: UC[n] base address + 0x14
Address: UC[n] base address + 0x10 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R OVR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R OVF
L
0 0 0 0 0 0 0 0 0 0 0 0 UCIN
UCO
UT
FLA
G
W w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 9-21. EMIOSS[n] field descriptions
Field Description
OVR Overrun bit
The OVR bit indicates that FLAG generation occurred when the FLAG bit was already set. This bit
can be cleared by writing a 1 to it or by writing a 1 to the FLAG bit.
0 Overrun has not occurred
1 Overrun has occurred
OVFL Overflow bit
The OVFL bit indicates that an overflow has occurred in the internal counter. OVFL must be cleared
by software writing a 1 to it.
0 No overflow
1 An overflow has occurred
UCIN Unified Channel Input pin bit
The UCIN bit reflects the input pin state after being filtered and synchronized.
UCOUT Unified Channel Output pin bit
The UCOUT bit reflects the output pin state.
FLAG FLAG bit
The FLAG bit is set when an input capture or a match event in the comparators occurred. To clear
this bit, write a 1 to it.
0 FLAG cleared
1 FLAG set event has occurred
To Next Page
Loading...
