NXP Semiconductors MPC5606S - Emios200 Output Update Disable (EMIOSOUDIS)

Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5606S Microcontroller Reference Manual, Rev. 7
244 Freescale Semiconductor
Channels that occupy a pair of slots are referred to by their lower slot number (LSB = 0 standard),
therefore the bits corresponding to their higher slot number always read 0.
9.4.2.3 eMIOS200 Output Update Disable (EMIOSOUDIS)
The two modules on this device, EMIOS0 and EMIOS1, have different structures for this register as shown
in Figure 9-8 and Figure 9-9.
Address: eMIOS1 base address +0x04 Access: User read-only
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 F23 F22 F21 F20 F19 F18 F17 F16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 9-7. eMIOS200 Global FLAG Register (EMIOSGFLAG) for EMIOS1
Table 9-11. EMIOSGFLAG field descriptions
Field Description
F[n] Channel [n] Flag bit
Address: eMIOS0 base address +0x08 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0
OU
23
OU
22
OU
21
OU
20
OU
19
OU
18
OU
17
OU
16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
OU
15
OU
14
OU
13
OU
12
OU
11
OU
10
OU
9
OU
8
0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 9-8. eMIOS200 Output Update Disable Register (EMIOSOUDIS) for EMIOS0