System Integration Unit Lite (SIUL)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1195
37.5.3.7 Interrupt Filter Enable Register (IFER)
This register is used to enable a digital filter counter on the corresponding external interrupt pads to filter
out glitches on the inputs.
37.5.3.8 Pad Configuration Registers (PCR0–PCR132)
The Pad Configuration Registers allow configuration of the static electrical and functional characteristics
associated with I/O pads. Each PCR controls the characteristics of a single pad.
NOTE
16/32-bit access is supported.
In addition to the bit map above, the following Table 37-11 describes the PCR register depending on the
pad type. The bits in shaded fields are not implemented for the particular I/O type. The PA field selecting
the number of alternate functions may or may not be present depending on the number of alternate
functions actually mapped on the pad.
Address: Base + 0x0030 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
IFE[13:0]
1
1
IFE[11:0] is valid in the 144-pin LQFP.
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 37-9. Interrupt Filter Enable Register (IFER)
Table 37-9. IFER field descriptions
Field Description
IFE[x] Enable digital glitch filter on the interrupt pad input.
0 Filter is disabled
1 Filter is enabled
Address: Base + 0x0040 (PCR0)(133 registers)
Base + 0x0042 (PCR1)
...
Base + 0x0148 (PCR132)
Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
SMC APC PA[1:0] OBE IBE ODE SRC[1:0] WPE WPS
W
Reset
1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
Reset value shown is for the most of the PCRs, however, some PCRs are initialized to different values dependent
on the requirements of the device. See
Chapter 3, Signal Description, for the reset configurations of each PCR on
this device.
Figure 37-10. Pad Configuration Registers (PCRx)
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