NXP Semiconductors MPC5606S - Sram

Overview
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 57
— Offers Read-While-Write functionality from main program space
— Same data retention and program erase specification as main program flash memory array
1.5.10 SRAM
The MPC5606S microcontrollers have as much as 48 KB general-purpose on-chip SRAM with the
following features:
• Typical SRAM access time: 0 wait-state for reads and 32-bit writes; 1 wait state for 8- and 16-bit
writes if back to back with a read to same memory block
• 32-bit ECC with single-bit correction, double bit detection for data integrity
• Supports byte (8-bit), half word (16-bit), and word (32-bit) writes for optimal use of memory
• User transparent ECC encoding and decoding for byte, half word, and word accesses
• Separate internal power domain applied to full SRAM block, 8 KB SRAM block during Standby
modes to retain contents during low-power mode.
1.5.11 On-chip graphics SRAM
The MPC5606S microcontroller has 160 KB on-chip graphics SRAM with the following features:
• Usable as general purpose SRAM
• Typical SRAM access time: 0 wait-state for reads and 32-bit writes
• Supports byte (8-bit), half word (16-bit), and word (32-bit) writes for optimal use of memory
1.5.12 Memory Protection Unit (MPU)
The MPU features the following:
• 12 region descriptors for per-master protection
• Start and end address defined with 32-byte granularity
• Overlapping regions supported
• Protection attributes can optionally include process ID
• Protection offered for three concurrent read ports
• Read and write attributes for all masters
• Execute and supervisor/user mode attributes for processor masters
1.5.13 Boot Assist Module (BAM)
The BAM is a block of read-only memory that is programmed once by Freescale. The BAM program is
executed every time the MCU is started up or reset in normal mode. The BAM supports different modes
of booting. They are:
• Booting from internal flash memory
• Serial boot loading (a program is downloaded into RAM via FlexCAN or LINFlex and then
executed)