NXP Semiconductors MPC5606S - Interrupt Mask Register (IMR)

Analog-to-Digital Converter (ADC)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 149
5.4.3.3 Interrupt Mask Register (IMR)
The Interrupt Mask Register (IMR) contains the interrupt enable bits for the ADC.
Address: Base + 0x001C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
EOC_CH95 EOC_CH94 EOC_CH93 EOC_CH92 EOC_CH91 EOC_CH90 EOC_CH89 EOC_CH88 EOC_CH87 EOC_CH86 EOC_CH85 EOC_CH84 EOC_CH83 EOC_CH82 EOC_CH81 EOC_CH80
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
EOC_CH79 EOC_CH78 EOC_CH77 EOC_CH76 EOC_CH75 EOC_CH74 EOC_CH73 EOC_CH72 EOC_CH71 EOC_CH70 EOC_CH69 EOC_CH68 EOC_CH67 EOC_CH66 EOC_CH65 EOC_CH64
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-9. Channel Pending Register 2 (CEOCFR2)
Table 5-10. CEOFRn field descriptions
Field Description
EOC_CH
n
This field indicates the end of conversion.
0 The measure of channel n is not complete.
1 The measure of channel n is complete.
Address: Base + 0x0020 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0
MSK
JEOC
MSK
JECH
MSK EOC MSK
ECH
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-10. Interrupt Mask Register (IMR)