NXP Semiconductors MPC5606S - Register Description

Memory Protection Unit (MPU)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 885
24.2.2 Register description
The following sections detail the individual registers within the MPU’s programming model.
24.2.2.1 MPU Control/Error Status Register (MPU_CESR)
The MPU_CESR provides one byte of error status plus three bytes of configuration information. A global
MPU enable/disable bit is also included in this register.
0x0420 MPU_RGD2 MPU Region Descriptor 2 128 R/W on page 888
0x0430 MPU_RGD3 MPU Region Descriptor 3 128 R/W on page 888
0x0440 MPU_RGD4 MPU Region Descriptor 4 128 R/W on page 888
0x0450 MPU_RGD5 MPU Region Descriptor 5 128 R/W on page 888
0x0460 MPU_RGD6 MPU Region Descriptor 6 128 R/W on page 888
0x0470 MPU_RGD7 MPU Region Descriptor 7 128 R/W on page 888
0x0480 MPU_RGD8 MPU Region Descriptor 8 128 R/W on page 888
0x0490 MPU_RGD9 MPU Region Descriptor 9 128 R/W on page 888
0x04A0 MPU_RGD10 MPU Region Descriptor 10 128 R/W on page 888
0x04B0 MPU_RGD11 MPU Region Descriptor 11 128 R/W on page 888
0x04C0–
0x07FF
Reserved
0x0800 MPU_RGDAAC0 MPU RGD Alternate Access Control 0 32 R/W on page 893
0x0804 MPU_RGDAAC1 MPU RGD Alternate Access Control 1 32 R/W on page 893
0x0808 MPU_RGDAAC2 MPU RGD Alternate Access Control 2 32 R/W on page 893
0x080C MPU_RGDAAC3 MPU RGD Alternate Access Control 3 32 R/W on page 893
0x0810 MPU_RGDAAC4 MPU RGD Alternate Access Control 4 32 R/W on page 893
0x0814 MPU_RGDAAC5 MPU RGD Alternate Access Control 5 32 R/W on page 893
0x0818 MPU_RGDAAC6 MPU RGD Alternate Access Control 6 32 R/W on page 893
0x081C MPU_RGDAAC7 MPU RGD Alternate Access Control 7 32 R/W on page 893
0x0820 MPU_RGDAAC8 MPU RGD Alternate Access Control 8 32 R/W on page 893
0x0824 MPU_RGDAAC9 MPU RGD Alternate Access Control 9 32 R/W on page 893
0x0828 MPU_RGDAAC10 MPU RGD Alternate Access Control 10 32 R/W on page 893
0x082C MPU_RGDAAC11 MPU RGD Alternate Access Control 11 32 R/W on page 893
0x0830–
0x3FFF
Reserved
Table 24-1. MPU memory map (continued)
Offset
address
Register name Register description
Size
(bits)
Access Location