FlexCAN
MPC5606S Microcontroller Reference Manual, Rev. 7
686 Freescale Semiconductor
18.3.4.3 Free Running Timer (TIMER)
This register represents a 16-bit free running counter that can be read and written by the CPU. The timer
starts from 0x0000 after Reset, counts linearly to 0xFFFF, and wraps around.
The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on the CAN bus). During a
message transmission/reception, it increments by one for each bit that is received or transmitted. When
there is no message on the bus, it counts using the previously programmed baud rate. During Freeze mode,
the timer is not incremented.
The timer value is captured at the beginning of the identifier field of any frame on the CAN bus. This
captured value is written into the Time Stamp entry in a message buffer after a successful reception or
transmission of a message.
Writing to the timer is an indirect operation. The data is first written to an auxiliary register and then an
internal request/acknowledge procedure across clock domains is executed. All this is transparent to the
user, except for the fact that the data will take some time to be actually written to the register. If desired,
software can poll the register to discover when the data was actually written.
28
LOM
Listen-Only Mode
This bit configures FlexCAN to operate in Listen-Only mode. In this mode, transmission is disabled,
all error counters are frozen, and the module operates in a CAN Error Passive mode [Ref. 1]. Only
messages acknowledged by another CAN station will be received. If FlexCAN detects a message
that has not been acknowledged, it will flag a BIT0 error (without changing the REC), as if it was
trying to acknowledge the message.
0 Listen-Only mode is deactivated
1 FlexCAN module operates in Listen-Only mode
29-31
PROPSEG
Propagation Segment
This 3-bit field defines the length of the Propagation Segment in the bit time. The valid
programmable values are 0–7.
Propagation Segment Time = (PROPSEG + 1) × Time-Quanta.
Time-Quantum = one Sclock period.
1
One time quantum is equal to the Sclock period.
Address: Base + 0x0008 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TIMER
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 18-7. Free Running Timer (TIMER)
Table 18-10. Control Register (CTRL) field descriptions (continued)
Field Description
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