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NXP Semiconductors MPC5606S - LIN Checksum Field Register (LINCFR)

NXP Semiconductors MPC5606S
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LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
854 Freescale Semiconductor
23.7.2.12 LIN checksum field register (LINCFR)
23.7.2.13 LIN control register 2 (LINCR2)
Address: Base + 0x002C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0
CF[0:7]
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 23-18. LIN checksum field register (LINCFR)
Table 23-18. LINCFR field descriptions
Field Description
0:23 Reserved
CF[0:7]
24:31
Checksum bits
When CCD bit in LINCR1 is cleared these bits are read-only. When CCD bit is set, these bits are
read/write. See Ta ble 23-4.
Address: Base + 0x0030 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0
IOBE IOPE
0 0 0 0 0 0 0 0
W
WURQ
DDRQ
DTRQ ABRQ HTRQ
Reset 0 1 * 0 0 0 0 0 0 0 0 0 0 0 0 0
*: This bit resets to 1 for LINFlex_0 and 0 for LINFlex_1.
Figure 23-19. LIN control register 2 (LINCR2)

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