NXP Semiconductors MPC5606S - Read;Write Access Control;Status (RWCS)

Nexus Development Interface (NDI)
MPC5606S Microcontroller Reference Manual, Rev. 7
966 Freescale Semiconductor
26.6.2.5 Read/Write Access Control/Status (RWCS)
The read/write access control/status register provides control for read/write access. Read/write access
provides DMA-like access to memory-mapped resources on the system bus while the processor is halted
or during runtime. Writes to this register do not begin until one JTAG clock (TCK) cycle after leaving the
JTAG Update-DR state. The RWCS register also provides read/write access status information as shown
in Table 26-9.
Nexus
Reg:
0x0007 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
AC RW SZ MAP PR
0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
CNT ERR DV
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-8. Read/Write Access Control/Status Register (RWCS)
Table 26-8. RWCS field description
Field Description
0
AC
Access Control.
0 End access.
1 Start access.
1
RW
Read/Write Select.
0 Read access.
1 Write access.
2–4
SZ[2:0]
Word Size.
000 8-bit (byte.)
001 16-bit (halfword).
010 32-bit (word).
011 64-bit (doubleword—only in burst mode).
100–111 Reserved (default to word).
5–7
MAP[2:0]
MAP Select.
000 Primary memory map.
001–111 Reserved.
8–9
PR[1:0]
Read/Write Access Priority.
00 Lowest access priority.
01 Reserved (default to lowest priority).
10 Reserved (default to lowest priority).
11 Highest access priority.
10–15 Reserved.