NXP Semiconductors MPC5606S - DMA Hardware Request Status (DMAHRSH, DMAHRSL) Registers

Enhanced Direct Memory Access (eDMA)
MPC5606S Microcontroller Reference Manual, Rev. 7
492 Freescale Semiconductor
15.3.1.15 DMA Hardware Request Status (DMAHRSH, DMAHRSL) registers
The DMAHRS{H,L} registers provide a bit map for the implemented channels {16,32,64} to show the
current hardware request status for each channel. DMAHRSH supports channels 63-32, while DMAHRSL
covers channels 31-00. Hardware request status reflects the current state of the registered and qualified (via
the DMAERQ field) ipd_req lines as seen by the DMA2’s arbitration logic. This view into the hardware
request signals may be used for debug purposes.
See Figure 15-20, Figure 15-21, and Figure 15-16 for the DMAHRS definition.
Address: Base + 0x0028 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
ERR
63
ERR
62
ERR
61
ERR
60
ERR
59
ERR
58
ERR
57
ERR
56
ERR
55
ERR
54
ERR
53
ERR
52
ERR
51
ERR
50
ERR
49
ERR
48
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ERR
47
ERR
46
ERR
45
ERR
44
ERR
43
ERR
42
ERR
41
ERR
40
ERR
39
ERR
38
ERR
37
ERR
36
ERR
35
ERR
34
ERR
33
ERR
32
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 15-18. DMA Error High (DMAERRH) register
Address: Base + 0x002C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
ERR
31
ERR
30
ERR
29
ERR
28
ERR
27
ERR
26
ERR
25
ERR
24
ERR
23
ERR
22
ERR
21
ERR
20
ERR
19
ERR
18
ERR
17
ERR
16
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
ERR
15
ERR
14
ERR
13
ERR
12
ERR
11
ERR
10
ERR
09
ERR
08
ERR
07
ERR
06
ERR
05
ERR
04
ERR
03
ERR
02
ERR
01
ERR
00
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 15-19. DMA Error Low (DMAERRL) register
Table 15-15. DMA Error (DMAERRH, DMAERRL) field descriptions
Name Description
ERRn,
n = 0,... 15
n = 0,... 31
n = 0,... 63
DMA Error n
0 An error in channel n has not occurred.
1 An error in channel n has occurred.