NXP Semiconductors MPC5606S - User Multiple Input Signature Register 2 (UMISR2)

Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
578 Freescale Semiconductor
17.2.6.20 User Multiple Input Signature Register 2 (UMISR2)
The Multiple Input Signature Register provides a mean to evaluate the Array Integrity.
The User Multiple Input Signature Register 2 represents the bits 95-64 of the whole 144 bits word (2
Double Words including ECC).
The UMISR2 Register is not accessible whenever MCR.DONE or UT0.AID are low: reading returns
indeterminate data while writing has no effect.
17.2.6.21 User Multiple Input Signature Register 3 (UMISR3)
The Multiple Input Signature Register provides a mean to evaluate the Array Integrity.
Address Offset: 0x00050 Reset value: 0x00000000
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
MS09
5
MS09
4
MS09
3
MS09
2
MS09
1
MS09
0
MS08
9
MS08
8
MS08
7
MS08
6
MS08
5
MS08
4
MS08
3
MS08
2
MS08
1
MS08
0
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
MS07
9
MS07
8
MS07
7
MS07
6
MS07
5
MS07
4
MS07
3
MS07
2
MS07
1
MS07
0
MS06
9
MS06
8
MS06
7
MS06
6
MS06
5
MS06
4
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-18. User Multiple Input Signature Register 2 (UMISR2)
Table 17-28. UMISR2 field descriptions
Field Description
0:31 MS095-064: Multiple input Signature 095-064 (Read/Write)
These bits represent the MISR value obtained accumulating the bits 95-64 of all the pages read from the
flash memory. 
The MS can be seeded to any value by writing the UMISR2 register.
Address Offset: 0x00054 Reset value: 0x00000000
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
MS12
7
MS12
6
MS12
5
MS12
4
MS12
3
MS12
2
MS12
1
MS12
0
MS11
9
MS11
8
MS11
7
MS11
6
MS11
5
MS11
4
MS11
3
MS11
2
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
MS11
1
MS11
0
MS10
9
MS10
8
MS10
7
MS10
6
MS10
5
MS10
4
MS10
3
MS10
2
MS10
1
MS10
0
MS09
9
MS09
8
MS09
7
MS09
6
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-19. User Multiple Input Signature Register 3 (UMISR3)