NXP Semiconductors MPC5606S - Integration Accumulator Register (ITGACC)

Stepper Stall Detect (SSD)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1163
36.3.2.3 Integration Accumulator Register (ITGACC)
Figure 36-4 below describes the fields of the integration accumulator (ITGACC) register:
The function of the ITGACC register bits is shown in Table 36-5.
36.3.2.4 Down Counter Register (DCNT)
Figure 36-5 below describes the fields of the down counter (DCNT) register:
The function of the DCNT register bits is shown in Table 36-6.
7
BLNIE
Blanking expired Interrupt Enable.
1 A module interrupt will occur if the BLNIF bit is set.
0 The BLNIF flag will not trigger an interrupt on the ips_int output.
6
ITGIE
Integration expired Interrupt Enable.
1 A module interrupt will occur if the ITGIF bit is set.
0 The ITGIF flag will not trigger an interrupt on the ips_int output.
0
ACOVIE
Accumulator Interrupt Enable.
1 A module interrupt will occur if the ACOVIF bit is set.
0 The ACOVIF flag will not trigger an interrupt on the ips_int output.
Offset 0x04 Access: User read/write
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R ITGACC
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-4. SSD Integration Accumulator Register (ITGACC)
Table 36-5. ITGACC Register field description
Field Description
15–0
ITGACC
Integration Accumulator readout value. This 2’s complement register represents the accumulator register
of the back EMF integrator of the SSD block.
Refer to the functional description of the integrator for further details.
Offset 0x06 Access: User read/write
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R DCNT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 36-5. SSD Down Counter Register (DCNT)
Table 36-4. IRQ Register field description (continued)
Field Description