NXP Semiconductors MPC5606S - Register Descriptions

Power Control Unit (MC_PCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
986 Freescale Semiconductor
29.3.2 Register descriptions
All registers may be accessed as 32-bit words, 16-bit half-words, or 8-bit bytes. The bytes are ordered
according to big endian. For example, the PD0 field of the PCU_PSTAT register may be accessed as a word
at address 0xC3FE_8040, as a half-word at address 0xC3FE_8042, or as a byte at address 0xC3FE_8043.
29.3.2.1 Power Domain #0 Configuration Register (PCU_PCONF0)
0xC3FE_800C
…
0xC3FE_803C
Reserved
0xC3FE_8040 PCU_PSTAT R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
R
PD2 PD1 PD0
W
0x044
…
0x07C
Reserved
0xC3FE_8080
…
0xC3FE_80FC
VREG registers
0xC3FE_8100
…
0xC3FE_BFFC
Reserved
Address 0xC3FE_8000 Access: Supervisor read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0
STBY0
0 0
STOP
0
HALT
RUN3 RUN2 RUN1 RUN0
DRUN
SAFE
TEST
RST
W
Reset 0 0 1 0 0 1 0 1 1 1 1 1 1 1 1 1
Figure 29-2. Power Domain #0 Configuration Register (PCU_PCONF0)
Table 29-2. MC_PCU memory map (continued)
Address Name
012327567891011 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31