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NXP Semiconductors MPC5606S - Features

NXP Semiconductors MPC5606S
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System Integration Unit Lite (SIUL)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1187
37.3 Features
The SIUL supports these distinctive features:
•GPIO
GPIO function on up to 133 I/O pins
Dedicated input and output registers for each GPIO pin
External interrupts
2 system interrupt vectors for up to 14 interrupt sources
14 programmable digital glitch filters
Independent interrupt mask
Edge detection
System configuration
Pad configuration control
37.4 External signal description
The pad configuration allows flexible, centralized control of the pin electrical characteristics of the MCU
with the GPIO control providing centralized general purpose I/O for an MCU that multiplexes GPIO with
other signals at the I/O pads. These other signals, or alternate functions, will normally be the peripherals
functions. The internal multiplexing allows user selection of the input to chip-level signal multiplexors.
Each GPIO port communicates via 16 I/O channels. In order to use the pad as a GPIO, the corresponding
Pad Configuration Registers (PCR) for all pads used in the port must be configured as GPIO rather than
as the alternate pad function.
Table 37-1 lists the external pins used by the SIUL.
Table 37-1. SIUL signal properties
External IRQ Flag PCR Port
Package
144 176 208
IRQ_0 EIF[0] PCR[1] PA [1 ] x x x
EIF[1] PCR[8] PA[ 8] x x x
EIF[2] PCR[9] PA[ 9] x x x
EIF[3] PCR[16] PB[0] x x x
EIF[4] PCR[18] PB[2] x x x
EIF[5] PCR[27] PB[11] x x x
EIF[6] PCR[29] PB[13] x x x
EIF[7] PCR[71] PF[1] x x x

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