NXP Semiconductors MPC5606S - PDI Status Mask Register

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 383
12.3.4.27 PDI Status Mask Register
Figure 12-36 represents the Mask PDI status register
Figure 12-36. PDI status mask register
26
pdi_lock_det
Status bit to inform the software PDI is frame locked to the camera interface.
0 Waiting for frame to lock
1 Frame lock is detected
27
pdi_vsync_det
Status bit to inform the software that vsync for the camera data has been detected.
0 pdi_vsync not detected
1 pdi_vsync is detected
28
pdi_hsync_det
Status bit to inform the software that hsync for the camera data has been detected.
0 pdi_hsync not detected
1 pdi_hsync is detected
29
pdi_de_det
Status bit to inform the software that data Enable for the camera data has been detected.
0 pdi_de not detected
1 pdi_de is detected
30
pdi_clk_lost
Status bit to inform the software that pdi_clk is lost
0 pdi_clk is present
1 pdi_clk is lost
31
pdi_clk_det
Status bit to inform the software that clock for the camera data has been detected.
0 pdi_clk not detected
1 pdi_clk is detected
Offset: 0x228 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0
m_pdi_blanking_err
m_pdi_ecc_err2 m_pdi_ecc_err1
m_pdi_lock_lost
m_pdi_lock_det
m_pdi_vsync_det
m_pdi_hsync_det
m_pdi_de_det
m_pdi_clk_lost
m_pdi_clk_det
W
Reset 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
Table 12-30. PDI Status Register field descriptions (continued)
Field Description