NXP Semiconductors MPC5606S - Chapter 34; SOUND_DURATION Register

Sound Generation Logic (SGL)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1113
34.3.2.2 SOUND_DURATION register
34.3.2.3 HIGH_PERIOD register
34.3.2.4 LOW_PERIOD register
Offset 0x04 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W SOUND_DURATION
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 34-4. SOUND_DURATION Register
Table 34-6. SOUND_DURATION field descriptions
Field Description
0–31
SOUND_DURATION
32-bit value which is loaded into bits [0:31] of SOUND_DURATION counter
Offset 0x08 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W HIGH_PERIOD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 34-5. HIGH_PERIOD Register
Table 34-7. HIGH_PERIOD field descriptions
Field Description
0–31
HIGH_PERIOD
32-bit value loaded into bits [0:31] of the HIGH_PERIOD counter. It defines the on period for
sound when operating in Periodic mode (that is, when bit 2 of MODE_SEL[SOUND_CTRL]
is 0b1).
Offset 0x0C Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W LOW_PERIOD
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 34-6. LOW_PERIOD Register