NXP Semiconductors MPC5606S - Register Map

Register Map
MPC5606S Microcontroller Reference Manual, Rev. 7
1258 Freescale Semiconductor
RCOSC128K 0xC3FE_0080 on page 1285
Real Time Counter (RTC/API) 0xC3FE_C000 on page 1287
Reset Generation Module (MC_RGM) 0xC3FE_4000 on page 1286
SGL 0xFFE7_8000 See chapter
SMC 0xFFE6_0000 See chapter
SSD 0 0xFFE6_1000 See chapter
SSD 1 0xFFE6_1800 See chapter
SSD 2 0xFFE6_2000 See chapter
SSD 3 0xFFE6_2800 See chapter
SSD 4 0xFFE6_3000 See chapter
SSD 5 0xFFE6_3800 See chapter
STM 0xFFF3_C000 on page 1298
SWT 0 0xFFF3_8000 on page 1298
SXOSC 0xC3FE_0040 on page 1285
System Integration Unit Lite (SIUL) 0xC3F9_0000 on page 1259
System Status and Configuration Module (SSCM) 0xC3FD_8000 on page 1281
WakeUp Unit 0xC3F9_4000 on page 1259
Table B-2. Detailed register map
Register description Register Name
Used
Size
Address
Program FLASH 0 Configuration Section 17.4.3, Memory map and register definition 0xC3F8_8000
Module Configuration Register CFLASH_MCR 32-bit Base + 0x0000
Low/Mid Address Space Block Locking Register CFLASH_LML 32-bit Base + 0x0004
High Address Space Block Locking Register CFLASH_HBL 32-bit Base + 0x0008
Secondary Low/Mid Address Space Block Locking Register CFLASH_SLL 32-bit Base + 0x000C
Low/Mid Address Space Block Select Register CFLASH_LMS 32-bit Base + 0x0010
High Address Space Block Select Register CFLASH_HBS 32-bit Base + 0x0014
Address Register CFLASH_ADR 32-bit Base + 0x0018
Bus Interface Unit Register 0 CFLASH_BIU0 32-bit Base + 0x001C
Bus Interface Unit Register 1 CFLASH_BIU1 32-bit Base + 0x0020
Bus Interface Unit Register 2 CFLASH_BIU2 32-bit Base + 0x0024
Reserved — — Base +
(0x0028–0x003B)
Table B-1. Module base addresses (continued)
Module name Base addresses Location