NXP Semiconductors MPC5606S - Chapter 40; Block Diagram

Interrupt Controller (INTC)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 753
21.3 Block diagram
Figure 21-1 is a block diagram of the interrupt controller (INTC).
1
The total number of interrupt sources is 122, which includes 16 reserved sources and 8 software sources.
Figure 21-1. INTC block diagram
21.4 Modes of operation
21.4.1 Normal mode
In normal mode, the INTC has two handshaking modes with the processor: software vector mode and
hardware vector mode.
Stepper Stall Detect 5 (SSD5) 1
Liquid Crystal Display 0 (LCD0) 1
QuadSPI 6
Table 21-1. Interrupt sources available (continued)
Interrupt sources Number Available
Hardware
Vector Enable
Software
Set/Clear
Interrupt
Registers
Flag Bits
Priority
Select
Registers
Peripheral
Interrupt
Requests
Module
Configuration
Register
Highest Priority
4
Priority
Comparator
Slave
Interface
for Reads
and Writes
1
Push/Update/Acknowledge
1
1
1
Update Interrupt Vector
1
Interrupt
Request to
Processor
Memory Mapped Registers
Non-Memory Mapped Logic
End of
Interrupt
Register
Request
Selector
Priority
Arbitrator
Highest
Priority
Interrupt
Requests
n
1
n
1
Vector
Encoder
Interrupt
Vector
9
Processor 0
Interrupt
Acknowledge
Register
Interrupt
Vector
9
n
1
8
n
1
x
4-bits
New
Priority
4
Current
Priority
4
Processor 0
Current
Priority
Register
Processor 0
Priority
LIFO
Pop
1
Lowest
Vector
Interrupt
Request
1
Vector Table
Entry Size
Pushed
Priority
4
Popped
Priority
4
Interrupt Acknowledge
Peripheral
Bus