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NXP Semiconductors MPC5606S - Block Diagram

NXP Semiconductors MPC5606S
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Overview
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 45
1.3 Block diagram
Figure 1-1 shows a top-level block diagram of the MPC5606S.
Figure 1-1. MPC5606S block diagram
1.4 Chip-level features
On-chip modules available within the family include the following features:
Six Gauge
Drivers
with
Stepper
Stall Detect
(SSD)
16 + 8 ch.
2 ×
DSPI
Test Controller
Nexus 2+
Nexus
SIU
Reset Control
Interrupt
External
IMUX
GPIO &
JTAG
Crossbar Switch
Pad Control
JTAG PortNexus Port
e200z0h
External
Blocks
32-bit
Controller
2 ×
FlexCAN
4 x 4
Peripheral Bridge
Peripheral
Interrupts from
Interrupt
Request
External
Interrupts
I/O
Instructions
Data
Voltage
Regulator
NMI
SWT
STM
NMI
SIU
. . .
. . .
. . .
. . .
(INTC)
4 × I
2
C
. . .
2 ×
LINFlex
2 x
eMIOS
16 ch.
ADC
MPU (Memory Protection Unit)
Clock Monitor Unit (CMU)
Controller
Flash
Flash
Power
Control
Mode
Entry
Clock
Generation
Module
Reset
Generation
Module
Unit
Module
BAM
RTC/
SSCM
API
10-bit
. . .
DMA
DCU
RGB TFT
Output
Parallel
Data
(PDI)
Interface
SIRC
FIRC
SXOSC
FXOSC
XTAL/
EXTAL
XTAL32/
EXTAL32
16 MHz
128 kHz
4–16 MHz
32 KHz
4 × PIT
LCD FP
and
BP signals
Sound
Generation
speaker/
buzzer
Data
and
Clock
QuadSPI
Controller
SRAM
SRAM
2 ×
FMPLL
Port
Controller
Video
Controller
SRAM
SRAM
40 × 4
LCD
Logic

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