NXP Semiconductors MPC5606S - C.6 Changes between Revisions 1 and 2

Revision History
MPC5606S Microcontroller Reference Manual, Rev. 7
1338 Freescale Semiconductor
C.6 Changes between revisions 1 and 2
Real Time Clock Updated the block diagram.
Revised the RTCC[ROVREN] field description.
IEEE 1149.1 Test
Access Port Controller
In the “e200z0 OnCE Register Addressing” table, changed the entry for “110 1111” (was
for SNC, is reserved).
Nexus Development
Interface
In the “Nexus Debug Interface Registers” table, deleted the entry for index 1.
Revised the DID figure and field description.
Deleted the text “The same values are used for the client select values written to the client
select control register” from the “Nexus Messaging” section.
Revised the “EVTI Generated Break Request” section.
Appendix B Corrected the ADC registers.
Table C-6. Changes between revisions 1 and 2
Chapter Description
Throughout Editorial changes (improvements in format and style).
Preface Added a preface to the document.
Overview Updated the block diagram, feature list, and device comparison table.
Emphasized that the block diagram is for the device with 1 MB flash memory.
In the “On-chip modules include” list:
• Changed the LINFlex and FlexCAN entries.
• Changed the maximum number of GPIO entries (was 164, is 133).
Memory Map Updated the column headings.
Inserted the correct names for the Mode Entry Module and Reset Generation Module.
Changed “(supports up to 4 [Quad]SPI Serial Flashes)” to “(supports one [Quad]SPI Serial
Flash)”.
Signal Description Updated content throughout the chapter.
Table C-5. Changes between revisions 2 and 3 (continued)
Chapter Description