NXP Semiconductors MPC5606S - Block Diagram

e200z0h Core
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 463
14.2.1.1 Block diagram
Figure 14-1. e200z0h block diagram
14.2.1.2 Instruction unit features
The features of the e200z0h Instruction unit are:
• 32-bit instruction fetch path supports fetching of one 32-bit instruction per clock, or up to two
16-bit VLE instructions per clock
• Instruction buffer with 4 entries in e200zh0, each holding a single 32-bit instruction, or a pair of
16-bit instructions
CPU
CONTROL LOGIC
LOAD/
DATA
NEXUS
DEBUG
UNIT
ADDRESS
STORE
UNIT
INSTRUCTION UNIT
BRANCH
UNIT
PC
UNIT
INSTRUCTION BUFFER
GPR
CR
SPR
MULTIPLY
UNIT
DATA BUS INTERFACE UNIT
CONTROL
32 32 N
OnCE/NEXUS
CONTROL LOGIC
INTERFACE
CONTROL
DATA
(MTSPR/MFSPR)
INTEGER
EXECUTION
UNIT
EXTERNAL
SPR
CTR
XER
LR
DATA
ADDRESS
INSTRUCTION BUS INTERFACE UNIT
CONTROL
32 32 N